Infineon Technologies TC1796 - 26.1.6.4 Width of Result Registers

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TC1796

Peripheral Units (Vol. 2 of 2)

Fast Analog-to-Digital Converter (FADC)

User’s Manual 26-20 V2.0, 2007-07

FADC, V2.0

26.1.6.4 Width of Result Registers

The additions executed in filter 0 and filter 1 together with the possible maximum values

of the filter parameters determine the width of the current, intermediate, and final result

registers.

An FADC conversion result always has a width of ten bits. A maximum of eight

conversion results can be added in the current result registers for an intermediate result.

This results in 10 + 3 = 13 bit width for the current result register and for the intermediate

result registers. The final result is built by the addition of at maximum four

current/intermediate result registers. Therefore, the width of the final result register is

13 + 2 = 15. These values for the result widths are valid for filter 0.

When both filters are concatenated, the width of FRR0 (15-bit) must be taken into

account when the filter 1 result register width is calculated. Filter 1 also allows eight input

values (filter 0 final results) to be added in its current result register for an intermediate

result. This results in 15 + 3 = 18 bits width for the current result register and for the

intermediate result registers of filter 1. The final result is built in filter 1 by the addition of

maximum two current/intermediate result values. Therefore, the width of the filter 1 final

result register is 18 + 1 = 19. Caused by the design, the two missing intermediate result

registers of filter 1 must be considered and the width of the filter 1 final result register is

additionally increased to 19 + 1 = 20.

Table 26-5 Data Width of Result Registers

Name

Result Width

Filter 0 Current Result Register CRR0 13-bit

Filter 0 Intermediate Result Register 1 IRR10

Filter 0 Intermediate Result Register 2 IRR20

Filter 0 Intermediate Result Register 3 IRR30

Filter 0 Final Result Register FRR0 15-bit

Filter 1 Current Result Register CRR1 18-bit

Filter 1 Intermediate Result Register 1 IRR11

Filter 1 Final Result Register FRR1 20-bit