TC1796
System Units (Vol. 1 of 2)
CPU Subsystem
User’s Manual 2-33 V2.0, 2007-07
CPU, V2.0
Note: There is no support for locked read-modify-write operations in the dual ported
memory.
2.6.3 Parity Protection for DMI Memories
In the TC1796, the LDRAM and DPRAM memory blocks of the DMI are equipped with a
parity error detection logic that makes it possible to detect parity errors separately for
LDRAM or DPRAM. In case of a parity error a NMI is generated.
Note that before using parity protection for DMI memory blocks the first time after a
power-on reset operation (before setting the corresponding parity error enable bit), the
LDRAM and DPRAM memories must be completely initialized by a user program that
writes every memory location of it once.
More details about the parity control for on-chip memories are described in Section 5.5
on Page 5-37.
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