Infineon Technologies TC1796 - 6.2.4 DLMB and PLMB Bus Registers

TC1796
System Units (Vol. 1 of 2)
On-Chip System Buses and Bus Bridges
User’s Manual 6-7 V2.0, 2007-07
Buses, V2.0
6.2.4 DLMB and PLMB Bus Registers
This section describes the registers of the DBCU/PBCU modules. The complete and
detailed address maps of DBCU/PBCU are described in Table 18-38/Table 18-41 on
Page 18-122/Page 18-125 of this TC1796 System Units (Vol. 1 of 2) User’s Manual.
LMB Bus Register Overview
Figure 6-4 DLMB/PLMB Bus Control Unit Registers
Table 6-3 Registers Address Space
Module Base Address End Address Note
DBCU F87F FA00
H
F87F FAFF
H
–
PBCU F87F FE00
H
F87F FEFF
H
–
Table 6-4 Registers Overview - LMB Bus Control Unit Registers
Register
Short Name
1)
1) Prefix x = “D” stands for “DBCU” and x = “P” for “PBCU”.
Register Long Name Offset
Address
Description
see
xBCU_ID xBCU Module Identification Register 08
H
Page 6-8
xBCU_LEATT xBCU LMB Error Attribute Register 20
H
Page 6-9
xBCU_LEADDR xBCU LMB Error Address Register 24
H
Page 6-12
xBCU_LEDATL xBCU LMB Error Data Low Register 28
H
Page 6-12
xBCU_LEDATH xBCU LMB Error Data High Register 2C
H
Page 6-13
xBCU_SRC xBCU Service Request Control Register FC
H
Page 6-13
MCA05630_mod
xBCU_LEATT
Module Identification
Register
Interrupt RegistersAddress/Data
Register
xBCU_LEADDR
xBCU_LEDATL
xBCU_LEDATH
xBCU_SRC
x = “D“ for DBCU
x = “P“ for PBCU
xBCU_ID
General Registers