TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual 11-32 V2.0, 2007-07
PCP, V2.0
Note: The DEBUG instruction must be only used in DEBUG mode; otherwise an “Illegal
Operation” (IOP) error will be generated.
11.5 PCP Interrupt Operation
The PICU and the PSRNs (PCP_SRC[11:0]) are similar to the CPU’s ICU and all other
SRNs in the system. They do, however, have some special characteristics, which are
described in the following sections. Figure 11-11 shows an overview of the PCP
interrupt scheme.
Figure 11-11 PCP Interrupt Block Diagram
11.5.1 Issuing Service Requests to CPU or PCP
The PCP may use one of two mechanisms to raise an interrupt request to the CPU or
itself. The first, and most inefficient, method for a PCP channel program is to issue
MCB05676
Winning SRPN,
Priority & Interrupt
Type
PCP Core
Queue
full
Nesting
available
CPPN SRPN TOS
PCP_SRC2
PCP_SRC3
PCP_SRC9
PCP_SRC10
PCP_SRC11
PCP_SRC0
PCP_SRC1
PCP Service Request Nodes
PICU
Suspended
interrupt
taken
PCP Queue
full
Interrupt Bus 0 (CPU)
Interrupt Bus 1 (PCP)
PCP Queue
Winner
PCP_SRC7
Select
PCP_SRC5
Select
PCP_SRC8
Select
PCP_SRC6
Select
PCP_SRC4
Select
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