TC1796
System Units (Vol. 1 of 2)
Program Memory Unit
User’s Manual 7-13 V2.0, 2007-07
PMU, V2.0
the Flash in its non-cached address space. Additionally, it is recommended to
include a dummy read cycle to a PMU register after the last write cycle of a
command sequence.
Note: User code (command sequences) that programs or erase Program Flash should
not be executed from internal program flash, but from other internal or external
memory (e.g. from SPRAM).
7.2.4.3 Page Mode
With the Enter Page Mode command, Page Mode is entered for one of the three Flash
banks and status flag FSR.PFPAGE (for PFLASH) or FSR.DFPAGE (for DFLASH) is
set. In Page Mode, the assembly buffer is ready to be filled with data in preparation for
a subsequent PFLASH or DFLASH programming operation. The width of the page
assembly buffer is 128-byte for DFLASH and 256-byte for PFLASH. Page Mode can be
entered only if the related Flash bank is not busy (if it does not execute program or erase
operations).
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