EasyManua.ls Logo

Infineon Technologies TC1796 - 7.2.10.4 Reset Control

Infineon Technologies TC1796
2150 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
TC1796
System Units (Vol. 1 of 2)
Program Memory Unit
User’s Manual 7-39 V2.0, 2007-07
PMU, V2.0
program but controlled by the Boot ROM startup procedure that is executed after each
reset operation.
7.2.10.4 Reset Control
The Flash module uses
The system reset, which is represented by the fast LMB reset; this reset includes all
reset sources (power-on, hardware, software and watchdog reset), and
The power-on reset.
The Flash will be automatically reset to Read Mode within 900 µsec (including Flash
ramp-up) after every reset represented by the system reset. When that happens, any
erase or programming operation that is running is aborted, and the Flash might have
erroneous data in the location being operated on (thus, the aborted operation must be
repeated). Such an aborted state can be detected by careful handling of the PROG and
ERASE flags in FSR.
Note: The startup time after reset until the first user instruction includes the Flash ramp-
up and the Boot ROM startup, and depends on the reset type (cold or warm) and
on the clock frequency (PLL free-running or application frequency). But for all
cases and f
CPU
> 12 MHz, it is < 1.5 msec.

Table of Contents