TC1796
System Units (Vol. 1 of 2)
Watchdog Timer
User’s Manual 16-32 V2.0, 2007-07
WDT, V2.0
16.6.3 Watchdog Timer Status Register
Register WDT_SR shows the current state of the WDT. Status include bits indicating
reset prewarning, Time-out, enable/disable status, input clock status, and access error
status.
The reset value for this register depends on the cause of the reset. For any reset other
than a Watchdog reset, the reset value is FFFC 001U
H
. After a Watchdog reset, bits
WDTAE and WDTOE indicate the type of Watchdog error that occurred before the
Watchdog reset. Either one or both bits can be set. These bits are not cleared on a
Watchdog reset. Bits WDTDS and WDTIS are always 0 after any reset.
0 [1:0],
[31:4]
r Reserved
Read as 0; should be written with 0.
WDT_SR
Watchdog Timer Status Register (28
H
) Reset Value: FFFC 0010
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
WDTTIM
rh
1514131211109876543210
0
WDT
PR
WDT
TO
WDT
DS
WDT
IS
WDT
OE
WDT
AE
r rhrhrhrhrhrh
Field Bits Type Description
WDTAE 0rhWatchdog Access Error Status Flag
0
B
No Watchdog access error.
1
B
An Watchdog access error has occurred.
This bit is set by hardware when an illegal Password
Access or Modify Access to register WDT_CON0 was
attempted. This bit is only cleared when:
• A power-on, hardware, or software reset occurs.
• WDT_CON0.ENDINIT is set to 1 during a Valid
Modify Access.
However, it is not possible to cleared this bit if the
WDT is in Prewarning Mode, indicated by
WDT_SR.WDTPR = 1.
Field Bits Type Description
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