TC1796
System Units (Vol. 1 of 2)
Reset and Boot Operation
User’s Manual 4-12 V2.0, 2007-07
Reset, V2.0
4.2.7 Booting Scheme
When the TC1796 is reset, it needs an indication how it has to start after the reset
sequence is finished. The TC1796 internal state is usually cleared through a reset,
especially in the case of a power-up reset. Thus, boot configuration information needs to
be applied by the external hardware through input pins. The boot configuration
information is required for:
• The start location of the code execution, and
• Activation of special modes and conditions
For the start of code execution and activation of special mode, the TC1796 implements
two basic booting schemes: A hardware booting scheme which is invoked through
external pins; and a software booting scheme, where software can determine the boot
options, overriding the externally-applied options.
Boot Options
Inputs HWCFG[3:0] (Port P10.[3:0]) and input BRKIN determine the boot mode and boot
location. Table 4-3 shows the boot options/selections which are available in the TC1796.
The source for BRKIN and HWCFG[3:0] can be either the corresponding bits HWBRKIN
and HWCFG[3:0] from register RST_SR (sampled from configuration pins) or the
software configuration bits SWBRKIN and SWCFG[3:0] from register RST_REQ.
The target boot address (program counter start address DFFF FFFC
H
) is located at the
end of the Boot ROM space. The Boot ROM code then decides how to proceed for the
selected boot modes. When Boot ROM code is left, jump instructions to different
dedicated addresses are executed. Note that pin TESTMODE must be at high level for
all normal boot selection shown in Table 4-3.
Table 4-3 TC1796 Boot Selections
BRKIN HWCFG
[3:0]
Type of Boot Boot ROM Exit
Jump Address
Normal Boot Options
1 0000
B
Enter bootstrap loader mode 1:
Serial ASC0 boot via ASC0 pins
D400 0000
H
0001
B
Enter bootstrap loader mode 2:
Serial CAN boot via CAN pins
0010
B
Start from internal PFLASH A000 0000
H
0011
B
Alternate Boot Mode (ABM): start from internal
PFLASH after CRC check is correctly executed;
enter a serial bootstrap loader mode
1)
if CRC
check fails;
as defined in
ABM header or
D400 0000
H
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