TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual 11-6 V2.0, 2007-07
PCP, V2.0
11.3 PCP Programming Model
The PCP programming model can be viewed as a set of autonomous programs, or tasks,
called channel programs, that share the processing resources of the PCP. channel
programs may be short and simple, or very complex; but they can coexist persistently
within the PCP.
From a programming point of view, the individual parts of a channel program are its
instruction sequence in the CMEM and its context in the PRAM. It uses the instruction
set and the GPRs (R0 - R7) of the PCP processor core to perform the necessary
operations, and to communicate with the various resources of the on-chip and off-chip
system depending on its task in the application.
These parts of the programming model are discussed in the following sections (with the
obvious exception of the system environment outside of the scope of the PCP).
11.3.1 General Purpose Register Set of the PCP
The program-accessible register file of the PCP is composed of eight 32-bit General
Purpose Registers (GPRs). These registers are all accessible by PCP programs directly
as part of the PCP instruction set. Source and destination registers must be specified in
most instructions. These registers are referenced to in this document as Rn or R[n],
where n is in the range 0 to 7.
Table 11-2 Directly Accessible Registers
Register Implicit Use Description
R0 Accumulator Implicit target for some arithmetic and logical instructions
R1 – 32-bit general-use register
R2 Return
Address
32-bit general-use register
R3 – 32-bit general-use register
R4 SRC (Source) Source Pointer for COPY instruction
R5 DST
(Destination)
Destination Pointer for COPY instruction
R6 CPPN/SRPN/
TOS/CNT1
CNT1: Transfer Count for COPY
TOS: Type-of-Service
SRPN: 8-bit field used for posting interrupt on EXIT
instruction
CPPN: Current PCP Priority Number
R7 DPTR/Flags PRAM Data Pointer (DPTR) and Status Flags
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