TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-67 V2.0, 2007-07
SCU, V2.0
5.13.2 SCU Status Register
The SCU Status Register SCU_STAT holds the status bits for the FPU interrupt (see
Section 5.4.1 on Page 5-35).
The Boot ROM code is always executed after every reset operation. Depending on the
program flow through the Boot ROM code and the Boot ROM exit path, several
resources of the TC1796 on-chip hardware have been used and are programmed. This
means that the state of on-chip hardware resources that have been used by the Boot
ROM code, may differ from the device reset state as described by the register reset
values. This section describes which initial state of the on-chip hardware resources is left
after a specific Boot ROM exit.
SCU_STAT
SCU Status Register (F0000054
H
) Reset Value: 0000 E000
H
1)
1) The initial value of SCU_STAT after Boot ROM exit is 0000 2000
B
.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0
PAR
AV
0 EEA 0 FII FVI FZI FUI FXI
rrh r rh r rh rh rh rh rh
Field Bits Type Description
FXI 0rhFPU Inexact Result Indication Flag
Indicates the state of the FPU’s FX status flag
latched during the last FPU interrupt.
FUI 1rhFPU Underflow Error Indication Flag
Indicates the state of the FPU’s FU status flag
latched during the last FPU interrupt.
FZI 2rhFPU Divide by Zero Error Indication Flag
Indicates the state of the FPU’s FZ status flag
latched during the last FPU interrupt.
FVI 3rhFPU Overflow Error Indication Flag
Indicates the state of the FPU’s FV status flag
latched during the last FPU interrupt.
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