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Infineon Technologies TC1796 - Page 288

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-66 V2.0, 2007-07
SCU, V2.0
SLSPDR 16 rw SLSO0/SLSO1 Pad Driver Strength Selection
0
B
Strong driver, sharp edge selected.
1
B
Strong driver, soft edge selected.
See also Page 10-83.
SSC0PDR 17 rw SSC0 Pad Driver Strength Selection
0
B
Strong driver, sharp edge selected
1
B
Strong driver, soft edge selected
See also Page 10-83.
GIN1S [19:18] rw GPTA Input1 Source Select
00
B
IN1 of GPTA input array
01
B
RxD0A
10
B
RxD0B
11
B
RxD1B
Details of GIN1S control are described in
Section 5.8 on Page 5-49.
ZERO [23:20] rw Spare 0 Control Bits
This bit field contains bits that are reserved for future
SCU control tasks. Field ZERO is set to 00
H
after
reset. ZERO bits should be written with 00
H
. Reading
ZERO bits will return the value last written.
ONE [31:24] rw Spare 1 Control Bits
This bit field contains bits that are reserved for future
SCU control tasks. Field ONE is set to FF
H
after
reset. ONE bits should be written with FF
H
. Reading
ONE bits will return the value last written.
0 [8:7],
[15:12]
r Reserved
Read as 0; should be written with 0.
Field Bits Type Description

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