TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-29 V2.0, 2007-07
DMA, V2.0
12.1.8.2 Transaction Lost Interrupt
Each DMA channel mn is able to detect a transaction request lost condition. This
condition becomes true when a new hardware or software DMA request occurs while the
previous transaction or transfer on DMA channel mn is not finished, indicated by
TRSR.CHmn still set. If such a transaction request lost condition occurs, bit
ERRSR.TRLmn is set. The transaction lost interrupts of all DMA channels are OR-ed
together to one common transaction lost interrupt that can be directed to one of the
interrupt outputs SR[15:0]
1)
by setting the transaction lost interrupt pointer EER.TRLINP
with a corresponding value.
A transaction request lost condition of DMA channel mn is indicated by status flag
ERRSR.TRLmn, which can be cleared by setting bit CLRE.CTLmn or CHRSTR.CHmn.
The transaction lost interrupt for DMA channel mn is enabled when bit EER.ETRLmn is
set.
Figure 12-20 Transaction Lost Interrupt
1) In the TC1796, only SR[7:0] are connected to interrupt nodes.
MCA05697_mod
TRL00
Transaction
Lost
Interrupt 00
ETRL00 TRLINP
EER
EERCLRE
Clear
CTL00
ERRS R
TRL17
Transaction
Lost
Interrupt 17
ETRL17
EERCLRE
Clear
CTL17
ERRS R
m = 0- 1, n = 0- 7
Set
CHRSTR
CH00
Clear
CHRSTR
CH17
Set CLear
4
³1
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