Infineon Technologies TC1796 - 10.10.3.4 Port 7 Pad Driver Mode Register and Pad Classes

TC1796
System Units (Vol. 1 of 2)
General Purpose I/O Ports and Peripheral I/O Lines
User’s Manual 10-69 V2.0, 2007-07
Ports, V2.0
10.10.3.4 Port 7 Pad Driver Mode Register and Pad Classes
The Port 7 pad driver mode register contains one bit field that determines the pad driver
mode (output driver strength and slew rate) of the Port 7 lines. The Port 7 port lines are
all class A1 pads (see also Figure 10-11).
P7_PDR
Port 7 Pad Driver Mode Register (40
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0PD0
rrw
Field Bits Type Description
PD0 [2:0] rw Pad Driver Mode for P7.[7:0]
(Class A1 pads; for coding see Page 10-11)
0 [31:3] r Reserved
Read as 0; should be written with 0.