TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-233 V2.0, 2007-07
GPTA, V2.0
24.5 LTCA2 Kernel Registers
This section describes the LTCA2 kernel registers. Some of the kernel registers
(SRSCn, SRSSn, LTCCTRk, and LTCXRk) are already described as GPTA kernel
register at the pages as referenced in column “Description see” of Table 24-23. The
multiplexer array FIFO registers are LTCA2 specific and therefore defined on the next
pages.
Figure 24-85 LTCA2 Kernel Registers
Table 24-23 LTCA2 Kernel Registers
Register
Short Name
Register Long Name Offset
Address
Description
see
ID Module Identification Register 008
H
Page 24-211
SRSC2 Service Request State Clear Register 2 020
H
Page 24-211
SRSS2 Service Request State Set Register 2 024
H
Page 24-212
SRSC3 Service Request State Clear Register 3 028
H
Page 24-213
SRSS3 Service Request State Set Register 3 02C
H
Page 24-214
MRACTL Multiplexer Register Array Control
Register
038
H
Page 24-236
MRADIN Multiplexer Register Array Data In
Register
03C
H
Page 24-238
MRADOUT Multiplexer Register Array Data Out
Register
040
H
Page 24-238
LTCCTRk Local Timer Cell Control Register k
(k = 00-62)
200
H
+
k × 8
Page 24-180
Control Registers Interrupt & IOLS
Registers
Data Registers
LTCXRkLTCCTRk
1) k = 00-63
2) n = 2-3
3) g = 0-4, 7-13
4) g = 0-7
1) 1)
MCA05994_mod
SRSCn
SRSSn
2)
2)
MRACTL
MRADIN
MRADOUT
Multiplexer Array
FIFO Registers
OMRCLg
OMRCHg
LIMCRLg
LIMCRHg
3)
3)
4)
4)
Note : The Multiplexer Array FIFO registers are not directly accessible !
ID
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