TC1796
System Units (Vol. 1 of 2)
General Purpose I/O Ports and Peripheral I/O Lines
User’s Manual 10-5 V2.0, 2007-07
Ports, V2.0
10.2 Port Register Description
The individual control and data bits of each GPIO port are implemented in a number of
registers. Bits with the same meaning and function are assembled together in the same
register. The registers are used to configure and use the port as general-purpose I/O or
alternate function input/output. For some ports, not all registers are implemented. The
availability of the registers in the specific ports is described in Table 10-6 on Page 10-19
up to Table 10-25 on Page 10-76.
Port Register Overview
Figure 10-3 Port Registers
Note: The complete address map of the GPIO ports is described in the Chapter 18
“Register Overview” of this TC1796 System Units (Vol. 1 of 2) User’s Manual.
Table 10-1 Registers Address Space
Module Base Address End Address Note
P0 F000 0C00
H
F000 0CFF
H
–
P1 F000 0D00
H
F000 0DFF
H
–
P2 F000 0E00
H
F000 0EFF
H
–
P3 F000 0F00
H
F000 0FFF
H
–
P4 F000 1000
H
F000 10FF
H
–
P5 F000 1100
H
F000 11FF
H
–
P6 F000 1200
H
F000 12FF
H
–
P7 F000 1300
H
F000 13FF
H
–
P8 F000 1400
H
F000 14FF
H
–
Control Register
Pn_IOCR0
Pn_IOCR1
Pn_IOCR2
Pn_IOCR3
Pn_PDR
Pn_OUT
Pn_OMR
Pn_ESR
Pn_IN
Data Register
MCA05654
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