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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-48 V2.0, 2007-07
MLI, V2.0
23.2.2.6 Transmit Priority
In the case that several requests for frame transmission are pending at the same time in
a MLI transmitter, the following priority scheme is applied, starting with the highest
priority.
For the Answer Frame, only one frame can be pending at a time in the transmitter. So
the user has to take care that an older Answer Frame is completely handled before
requesting a new one. The same applies for the base address copy frame.
Answer Frame (only one frame pending allowed at a time)
Software driven Command Frames (CV0 before CV1 before CV2 before CV3)
Read or Write Frames (DV0 before DV1 before DV2 before DV3)
Base Address Copy Frame (only one frame pending allowed at a time)
23.2.2.7 Transmission Delay
A transmission delay can be introduced in the transmitter between the detection of the
rising edge of the RREADY input signal and the next possible frame start. This delay
represents the minimum time between the acknowledge of a former frame by RREADY
and a new frame (if a request is pending). The delay is defined by bit field TCR.TDEL in
cycles of the transmitter system clock f
SYS
.

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish