TC1796
System Units (Vol. 1 of 2)
On-Chip Debug Support
User’s Manual 17-15 V2.0, 2007-07
OCDS, V2.0
17.5 JTAG Interface
The JTAG interface is a standardized unit that is typically used for boundary scan and
internal device tests. Because both of these applications are not active during normal
device operation in a system, the JTAG port can be used during normal device operation
as an ideal interface for debugging tasks.
On the other hand, the TC1796 OCDS is designed to support complex multi-
core/debugging environments. The challenge here is that several debugger applications
may have to share a single resource, i.e. the same JTAG interface. This becomes even
more complicated because the JTAG module contains the IEEE 1149.1 JTAG state
machine, which needs to be handled in the correct manner.
The solution to this problem is the JTAG driver with its JTAG-API (Application
Programming Interface). It allows several debugger applications to share the same
JTAG interface. For example, it is possible to run a PCP debugger concurrently with a
TriCore debugger on the same TC1796 device. In addition, the tool-specific PC
interfaces such as Ethernet, printer-port, or even USB can be hidden from the debugger
software by the JTAG-API layer.
The JTAG-API enables the debugger vendor to forget about the complex task of
understanding the JTAG module and supporting its functionality at low-level. All required
information is provided as specifications and function references, ready for direct
implementation into the tool-source, without the need to re-invent the wheel.
The maximum JTAG interface clock frequency (f
TCK
) is 20 MHz. The following JTAG
interface clock frequencies can be achieved:
Table 17-2 Cerberus Performance (Net Data Rates)
Operation f
TCK
= 200 kHz f
TCK
= 10 MHz f
TCK
= 20 MHz
Random Read 48 kbit/s 2.4 Mbit/s 4.6 Mbit/s
Random Write 50 kbit/s 2.5 Mbit/s 4.9 Mbit/s
Block Read 104 kbit/s 5.2 Mbit/s 10.0 Mbit/s
Block Write 114 kbit/s 5.7 Mbit/s 11.2 Mbit/s
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