TC1796
System Units (Vol. 1 of 2)
Memory Maps
User’s Manual 9-1 V2.0, 2007-07
MemMaps, V2.0
9 Memory Maps
This chapter gives an overview of the TC1796 memory map, and describes the address
locations and access possibilities for the units, memories, and reserved areas as “seen”
from the three different on-chip buses’ points of view.
The TC1796 has the following memories:
• Data Memory Unit (DMU) with
– 64 Kbyte of Data Memory (SRAM)
– 16 Kbyte of Stand-by Data Memory (SBRAM)
• Program Memory Unit (PMU) with
– 2 Mbyte of Program Flash Memory (PFLASH)
– 128 Kbyte of Data Flash Memory (DFLASH)
– 8 Kbyte of Boot ROM (BROM)
– 8 Kbyte of Test ROM (TROM)
• Program Memory Interface (PMI)
– 48 Kbyte of Scratch-Pad RAM (SPRAM)
– 16 Kbyte of Instruction Cache (ICACHE)
• Data Memory Interface (DMI)
– 56 Kbyte of Local Data RAM (LDRAM)
– 8 Kbyte of Dual-Port RAM (DPRAM)
• PCP memory
– 32 Kbyte of PCP Code Memory (CMEM)
– 16 Kbyte of PCP Data Memory (PRAM)
Furthermore, the TC1796 has four on-chip buses:
• System Peripheral Bus (SPB)
• Remote Peripheral Bus (RPB)
• Program Local Memory Bus (PLMB)
• Data Local Memory Bus (DLMB)
9.1 How to Read the Address Maps
The bus-specific address maps describe how the different bus master devices react on
accesses to on-chip memories and modules, and which address ranges are valid or
invalid for the corresponding buses.
The FPI Bus address map shows the system addresses from the point of view of the
SPB and RPB master agents. SPB master agents are PCP2, OCDS, and DMA (BI0).
The RPB is a single master bus with DMA (BI1) as the only master agent. Note that SPB
and RPB are combined in the single FPI Bus address map for simplification.
The PLMB address map shows the system addresses from the point of view of the PLMB
master (PMI).
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