Infineon Technologies TC1796 - Page 306

TC1796
System Units (Vol. 1 of 2)
On-Chip System Buses and Bus Bridges
User’s Manual 6-13 V2.0, 2007-07
Buses, V2.0
DBCU_LEDATH
DBCU LMB Error Data High Register (2C
H
) Reset Value: XXXX XXXX
H
PBCU_LEDATH
PBCU LMB Error Data High Register (2C
H
) Reset Value: XXXX XXXX
H
31 0
LEDAT[63:32]
rh
Field Bits Type Description
LEDAT[63:32] [31:0] rh LMB Bus Address Bits [31:0]
This bit field holds the upper 32-bit part of the 64-bit
LMB data that has been captured at an LMB bus
error.
LEDAT[63:32] only contains valid read data when bit
LEC in the corresponding register LEATT is set.
DBCU_SRC
DLMB Service Request Control Register(FC
H
) Reset Value: 0000 0000
H
PBCU_SRC
PBCU Service Request Control Register(FC
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
SET
R
CLR
R
SRR SRE TOS 0 SRPN
w w rh rw r r rw
Field Bits Type Description
SRPN [7:0] rw Service Request Priority Number
TOS [11:10] r Type-of-Service State
Always read as 00
B
. This means type-of-service is
associated with interrupt bus 0 (CPU interrupt
arbitration bus).