TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-52 V2.0, 2007-07
EBU, V2.0
Figure 13-17 shows a typical connection for Intel-style and Motorola-style peripherals.
The MR/W signal indicates the data direction for the current transfer, and can be used
to control the data direction through the buffer for the D[31:0] bus (as well as controlling
whether an access to a Motorola-Style device is read or write).
Figure 13-17 Typical Connection of Asynchronous Devices
A[23:0]
D[31:0]
32-Bit
Intel-style
Device
MCA05728
A[23:0]
D[31:0]
CE
OE
WE
CSx
CSy
RD
RD/WR
TC1796
EBU
MR/W
A[23:0]
D[31:0]
32-Bit
Motorola
-style
Device
AS
R/W
DTACK
WAIT
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