TC1796
System Units (Vol. 1 of 2)
Register Overview
User’s Manual 18-81 V2.0, 2007-07
Regs, V2.0
Table 18-27 Address Map of SSC0/SSC1
Short Name Description Address Access Mode Reset Value
Read Write
Synchronous Serial Interface 0 (SSC0)
SSC0_CLC SSC0 Clock Control
Register
F010 0100
H
U, SV SV, E 0000 0003
H
SSC0_
PISEL
SSC0 Port Input Select
Register
F010 0104
H
U, SV U, SV 0000 0000
H
SSC0_ID SSC0 Module
Identification Register
F010 0108
H
U, SV BE 0000 45XX
H
SSC0_ FDR SSC0 Fractional Divider
Register
F010 010C
H
U, SV SV, E 0000 0000
H
SSC0_CON SSC0 Control Register F010 0110
H
U, SV U, SV 0000 0000
H
SSC0_ BR SSC0 Baud Rate Timer
Reload Register
F010 0114
H
U, SV U, SV 0000 0000
H
SSC0_
SSOC
SSC0 Slave Select
Output Control Register
F010 0118
H
U, SV U, SV 0000 0000
H
SSC0_
SSOTC
SSC0 Slave Select
Output Timing Control
Register
F010 011C
H
U, SV U, SV 0000 0000
H
SSC0_TB SSC0 Transmit Buffer
Register
F010 0120
H
U, SV U, SV 0000 0000
H
SSC0_RB SSC0 Receive Buffer
Register
F010 0124
H
U, SV U, SV 0000 0000
H
SSC0_
STAT
SSC0 Status Register F010 0128
H
U, SV U, SV 0000 0000
H
SSC0_EFM SSC0 Error Flag
Modification Register
F010 012C
H
U, SV U, SV 0000 0000
H
SSC0_
RXFCON
SSC0 Receive FIFO
Control Register
F010 0130
H
U, SV U, SV 0000 0100
H
SSC0_
TXFCON
SSC0 Transmit FIFO
Control Register
F010 0134
H
U, SV U, SV 0000 0100
H
SSC0_
FSTAT
SSC0 FIFO Status
Register
F010 0138
H
U, SV U, SV 0000 0000
H
– Reserved F010 013C
H
-
F010 01F0
H
BE BE –
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