TC1796
Peripheral Units (Vol. 2 of 2)
Synchronous Serial Interface (SSC)
User’s Manual 20-15 V2.0, 2007-07
SSC, V2.1
The RXFIFO is flushed automatically at a reset operation of the SSC module or if the
RXFIFO becomes disabled (resetting bit RXFCON.RXFEN) after it was previously
enabled. Resetting bit CON.EN without resetting RXFCON.RXFEN does not affect
(reset) the RXFIFO state. This means that the receive operation of the SSC is stopped,
in this case, without changing the content of the RXFIFO. After setting CON.EN again,
the RXFIFO with its content is again available.
Figure 20-7 Receive FIFO Operation Example
MCA05782
RIR
MRST
FSTAT.
RXFFL
0001 00000011001000010000
RX
FIFO
empty
In this example: RXFCON.RXFITL = 0011
B
0100
Byte 1 Byte 2 Byte 3
Byte 1
Byte 2
Byte 1
Byte 4
Byte 1
Byte 2
Byte 1
Byte 2
Byte 3 Byte 3
Byte 4 Byte 4 Byte 4
Byte 5
0010
Byte 4
Byte 5
Byte 6
0011
RIRRIR
Byte 6Byte 5
Read Byte 1
Read Byte 2
Read Byte 3
Read Byte 4
Read Byte 5
Read Byte 6
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