Infineon Technologies TC1796 - Page 140

TC1796
System Units (Vol. 1 of 2)
CPU Subsystem
User’s Manual 2-43 V2.0, 2007-07
CPU, V2.0
AND.GE.U 11OR.NE 11
AND.LT 11OR.NOR.T 11
AND.LT.U 11OR.OR.T 11
AND.NE 11OR.T 11
AND.NOR.T 11ORN 11
AND.OR.T 11ORN.T 11
AND.T 11XNOR 11
ANDN 11XNOR.T 11
ANDN.T 11XOR 11
NAND 11XOR.EQ 11
NAND.T 11XOR.GE 11
NOR 11XOR.GE.U 11
NOR.T 11XOR.LT 11
OR 11XOR.LT.U 11
OR.AND.T 11XOR.NE 11
OR.ANDN.T 11XOR.T 11
Move Instructions
CMOV 11MOV.U 11
CMOVN 11MOVH 11
MOV 11
Shift Instructions
SH 11SH.NE 11
SH.AND.T 11SH.NOR.T 11
SH.ANDN.T 11SH.OR.T 11
SH.EQ 11SH.ORN.T 11
SH.GE 11SH.XNOR.T 11
SH.GE.U 11SH.XOR.T 11
SH.H 11SHA 11
SH.LT 11SHA.H 11
SH.LT.U 11SHAS 11
Table 2-10 Simple Arithmetic Instruction Timing (cont’d)
Instruction Result
Latency
Repeat
Rate
Instruction Result
Latency
Repeat
Rate