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Infineon Technologies TC1796 - Page 1422

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
Controller Area Network (MultiCAN) Controller
User’s Manual 22-127 V2.0, 2007-07
MultiCAN, V2.0
IENTRAF0 20 rw Interrupt Enable if TRAF = 0
This bit enables the generation of an interrupt when
bit TTSR.TRAF = 0 and a match is detected between
the cycle time and the time mark value defined by
TMV.
0
B
Interrupt generation is disabled.
1
B
Interrupt generation is enabled.
IENTRAF1 21 rw Interrupt Enable if TRAF = 1
This bit enables the generation of an interrupt when
bit TTSR.TRAF = 1 and a match is detected between
the cycle time and the time mark value defined by
TMV.
0
B
Interrupt generation is disabled.
1
B
Interrupt generation is enabled.
IENRECF0 22 rw Interrupt Enable if RECF = 0
This bit enables the generation of an interrupt when
when bit TTSR.RECF = 0 and a match is detected
between the cycle time and the time mark value
defined by TMV.
0
B
Interrupt generation is disabled.
1
B
Interrupt generation is enabled.
IENRECF1 23 rw Interrupt Enable if RECF = 1
This bit enables the generation of an interrupt when
when bit TTSR.RECF = 1 and a match is detected
between the cycle time and the time mark value
defined by TMV.
0
B
Interrupt generation is disabled.
1
B
Interrupt generation is enabled.
Field Bits Type Description

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