TC1796
System Units (Vol. 1 of 2)
Clock System and Control
User’s Manual 3-2 V2.0, 2007-07
Clock, V2.0
Figure 3-1 TC1796 Clocking System
Main Oscillator
& PLL
PLL_CLC
Register
DMI / DMU
PMI / PMU
TriCore
CPU
PBCU
DBCU
EBU EBU_CLC
LFI
MCA05599_mod
ASC0
f
ASC
ASC1
SSC0
SSC1
MultiCAN
GPTA0
System CLK
f
SYS
XTAL1
XTAL2
f
SSC0
f
CLC0
f
SSC1
f
CLC1
f
CAN
f
CLC
GPTA1
LTCA2
f
CLC
f
GPTA0
f
LTCA2
f
GPTA1
MSC0
MSC1
f
MSC 0
f
CLC0
f
MSC 1
f
CLC1
MLI 0
MLI 1
f
ML I0
f
ML I1
ADC0
f
ADC
f
CLC
ADC1
FADC
f
FADC
f
CLC
SCU_
SCLKFDR
f
SYSC L K
P1.12 /
SYSCLK
DMA DMA_CLC
f
DMA
PCP
PCP_CLC
f
PC P
STM STM_CLC
f
STM
CPU Clock
f
CPU
SCU
RBCU
SBCU
WDT
ICU
f
EBU
The module clock for these modules is
switched off after reset (module is disabled ).
For these modules
f
MOD
= f
SYS
. Its module clock
can only be switched on or off ( no clock divider ).
ASC0_CLC
SSC0_CLC
SSC0_FDR
SSC1_CLC
SSC1_FDR
CAN_CLC
CAN_FDR
GPTA_CLC
GPTA_FDR
GPTA_EDCTR
MSC0_CLC
MSC0_FDR
MSC1_CLC
MSC1_FDR
MLI0_FDR
MLI1_FDR
ADC0_CLC
ADC0_FDR
FADC_CLC
FADC_FDR
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