Infineon Technologies TC1796 - Page 1591

TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-82 V2.0, 2007-07
MLI, V2.0
CBAV 17 w Clear BAV Flag
0
B
No effect.
1
B
Bit TRSTATR.BAV is cleared.
CAV 24 w Clear AV Flag
0
B
No effect.
1
B
Bit TRSTATR.AV is cleared.
CRPE 25 w Clear Receiver PE Flag
0
B
No effect.
1
B
Bit RCR.PE is cleared.
CTPE 26 w Clear Transmitter PE Flag
0
B
No effect.
1
B
Bit TSTATR.PE is cleared.
CNAE 27 w Clear NAE Flag
0
B
No effect.
1
B
Bit TSTATR.NAE is cleared.
0 [7:5],
[23:18],
[31:28]
w Reserved
Read as 0; should be written with 0.
Field Bits Type Description