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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-89 V2.0, 2007-07
MLI, V2.0
The Access Range Register ARR determines size and number of the address sub-range
n (n = 0-3).
Note: See Page 23-46 for bit field definitions and Page 23-141 for the TC1796-specific
address range and address range extension definitions.
ARR
Access Range Register (BC
H
) Reset Value: 0000 0000
H
31 29 28 24 23 21 20 16 15 13 12 8 7 5 4 0
SIZE3 SLICE3 SIZE2 SLICE2 SIZE1 SLICE1 SIZE0 SLICE0
rw rw
Field Bits Type Description
SLICE0 [4:0] rw Address Slice 0
SLICE0 selects a specific sub-range within address
sub-range 0.
SIZE0 [7:5] rw Address Size 0
SIZE0 determines the sub-range size within address
sub-range 0.
SLICE1 [12:8] rw Address Slice 1
SLICE1 selects a specific sub-range within address
sub-range 1.
SIZE1 [15:13] rw Address Size 1
SIZE1 determines the sub-range size within address
sub-range 1.
SLICE2 [20:16] rw Address Slice 2
SLICE2 selects a specific sub-range within address
sub-range 2.
SIZE2 [23:21] rw Address Size 2
SIZE2 determines the sub-range size within address
sub-range 2.
SLICE3 [28:24] rw Address Slice 3
SLICE3 selects a specific sub-range within address
sub-range 3.
SIZE3 [31:29] rw Address Size 3
SIZE3 determines the sub-range size within address
sub-range 3.

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish