TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-111 V2.0, 2007-07
MLI, V2.0
MOD 8rhMode of Operation
This bit determines the data transfer operation mode of
the MLI receiver. Bit MOD can be set by hardware with
the reception of a pipe 2 Command Frame (see
Page 23-98). It can be set or cleared by software via bits
SCR.SMOD or SCR.CMOD.
0
B
Automatic Data Mode is disabled.
Data read/write operations from/to a Remote
Window must be executed by a bus master (e.g.
the CPU).
1
B
Automatic Data Mode is enabled.
Data read/write operations from/to a Remote
Window are executed by the MLI’s move engine.
DW [10:9] rh Data Width
This bit field is updated by the MLI receiver whenever
new data is received in the RDATAR register. DW
indicates the relevant data width.
00
B
8-bit relevant data width in RDATAR
01
B
16-bit relevant data width in RDATAR
10
B
32-bit relevant data width in RDATAR
11
B
Reserved
TF [12:11] rh Type of Frame
This bit field determines the frame type that has most
recently been received by the MLI receiver. It is updated
whenever the MLI receiver updates RDATAR, RADDR,
or RPxBAR.
The most recently received frame was a:
00
B
Copy Base Address Frame
01
B
Discrete Read Frame or Optimized Read Frame
10
B
Write Offset and Data Frame or Optimized Write
Frame
11
B
Answer Frame
Note that the coding of TF is different from the frame
coding as defined in Table 23-1 on Page 23-11.
PE 13 rh Parity Error
PE is set when a parity error is detected in a received
frame (see Page 23-42). PE is cleared by hardware
when a frame has been received without parity error. PE
can be cleared by software via bit SCR.CRPE.
Field Bits Type Description
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