Infineon Technologies TC1796 - Page 1664

TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-9 V2.0, 2007-07
GPTA, V2.0
Figure 24-3 Interconnections in the CGU Module
MCA05912
SOT0
f
GPTA
FPC0
Signal Inp.Clock
GPTA
Inputs
SOL0
SOT1
FPC1
Signal Inp.Clock
SOL1
SOT2
FPC2
Signal Inp.Clock
SOL2
SOT3
FPC3
Signal Inp.Clock
SOL3
SOT4
FPC4
Signal Inp.Clock
SOL4
SOT5
FPC5
Signal Inp.Clock
SOL5
M
U
X
Control
Logic
M
U
X
DCM0
DCM1
PDL0
F0
B0
M
U
X
Control
Logic
M
U
X
DCM2
DCM3
PDL1
F0
B0
PLL
CDU
GPTA
Inputs
GPTA
Inputs
GPTA
Inputs
GPTA
Inputs
GPTA
Inputs
Clock
Bus
8
Ext.
PLL
Clock
Inputs
CLK1 / CLK2 / CLK3
PDL0
PDL1
PDL2
PDL3
PDL
Bus
Int. PLL
Clock
Outputs
4
3
4
3
4
3
4
3
4
3
4
3
4