TC1796
System Units (Vol. 1 of 2)
Clock System and Control
User’s Manual 3-25 V2.0, 2007-07
Clock, V2.0
SPEN 2rwModule Suspend Enable
Used for enabling the suspend mode.
0
B
Module cannot be suspended
(suspend is disabled).
1
B
Module can be suspended (suspend is enabled).
This bit can be written only if SBWE is set to 1 during
the same write operation.
EDIS 3rwSleep Mode Enable Control
Used for module sleep mode control.
0
B
Sleep mode request is regarded. Module is
enabled to go into sleep mode.
1
B
Sleep mode request is disregarded: Sleep mode
cannot be entered on a request.
SBWE 4wModule Suspend Bit Write Enable for OCDS
Determines whether SPEN and FSOE are write-
protected.
0
B
Bits SPEN and FSOE are write-protected
1
B
Bits SPEN and FSOE are overwritten by
respective value of SPEN or FSOE
This bit is a write-only bit. The value written to this bit is
not stored. Reading this bit returns always 0.
FSOE 5rwFast Switch Off Enable
Used for fast clock switch-off in OCDS suspend mode.
0
B
Clock switch-off in OCDS suspend mode via
Disable Control Feature (Secure Clock Switch
Off) selected
01
B
Fast clock switch off in OCDS suspend mode
selected
This bit can be written only if SBWE is set to 1 during
the same write operation.
RMC [15:8] rw 8-Bit Clock Divider Value in RUN Mode
This is a maximum 8-bit divider value for clock f
SYS
.
If RMC is set to 0 the module is disabled.
0 7, 6,
[31:16]
r Reserved
Read as 0; should be written with 0.
Field Bits Type Description
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