Infineon Technologies TC1796 - Page 1748

TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-93 V2.0, 2007-07
GPTA, V2.0
IOG2 – IN[23:16] OUT[23:16]
IOG3 – IN[31:24] OUT[31:24]
IOG4 – IN[39:32] OUT[39:32]
IOG5 – IN[47:40] OUT[47:40]
IOG6 – IN[55:48] OUT[55:48]
Output Groups
OG0 – – OUT[07:00]
OG1 – – OUT[15:08]
OG2 – – OUT[23:16]
OG3 – – OUT[31:24]
OG4 – – OUT[39:32]
OG5 – – OUT[47:40]
OG6 – – OUT[55:48]
Clock Group
– – – CLK[7:0]
FPC/INT Groups
FPC[5:0] – – SOT[5:0]
External Input [1:0] – – INT[1:0]
PDL/INT Groups
PDL[1:0] PDL Bus – – PDL[3:0]
External Input [3:0] – – INT[3:0]
Table 24-8 Group to I/O Line/Cell Assignment (cont’d)
Group/Module Cell/Line Input Output