TC1796
System Units (Vol. 1 of 2)
Clock System and Control
User’s Manual 3-28 V2.0, 2007-07
Clock, V2.0
breakpoint is reached. In such cases, it may not be desired that the kernel of a module
finish whatever transaction is in progress before stopping, because that might cause
important states in this module to be lost. Fast Shut-off Mode, controlled by bit FSOE, is
available for this situation.
If FSOE = 0, modules are stopped as described above. This is called Secure Shut-off
Mode. The module kernel is allowed to finish whatever operation is in progress. The
clock to the unit is then shut off if both the bus interface and the module kernel have
finished their current activity. If Fast Shut-off Mode is selected (FSOE = 1), clock
generation to the unit is stopped as soon as any outstanding bus interface operation is
finished. The clock control unit does not wait until the kernel has finished its transaction.
This option stops the unit’s clock as fast as possible, and the state of the unit will be the
closest possible to the time of the occurrence of the software breakpoint.
Note: In all TC1796 modules except MultiCAN and DMA, the only shut down operating
mode that is available is the Fast Shut-off ModeTC1796, regardless of the state of
the FSOE bit.
Whether Secure Shut-off Mode or Fast Shut-off Mode is required depends on the
application, the needs of the debugger, and the type of unit. For example, the analog-to-
digital converter might allow the converter to finish a running analog conversion before
it can be suspended. Otherwise the conversion might be corrupted and a wrong value
could be produced when Debug Suspend Mode is exited and the unit is enabled again.
This would affect further emulation and debugging of the application’s program.
On the other hand, if a problem is observed to relate to the operation of the external
analog-to-digital converter itself, it might be necessary to stop the unit as fast as possible
in order to monitor its current instantaneous state. To do this, the Fast Shut-off Mode
option would be selected. Although proper continuation of the application’s program
might not be possible after such a step, this would most likely not matter in such a case.
Note that it is never appropriate for application software to set the FSOE bit. Fast Shut-
off Mode should only be set by debug software. To guard against application software
accidently setting FSOE, bit FSOE is specially protected by the mask bit SBWE. The
SPEN bit can only be written if, during the same write operation, SBWE is set, too.
Application software should never set SBWE to 1. In this way, user software can not
accidentally alter the value of the FSOE bit. Note that this is the same guard mechanism
used for the SPEN bit.
Module Clock Divider Control
Two peripheral modules of the TC1796, ASC0_CLC and STM_CLC, have a RMC control
bit field in their CLC registers. This Run Mode Clock control bit field makes it possible to
slow down the CLC clock via a programmable clock divider circuit.
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