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Infineon Technologies TC1796 - Page 1815

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-160 V2.0, 2007-07
GPTA, V2.0
MUX1 4rwOutput Signal Source Selection for PDL1
0
B
DCM2 cell input is driven by fed-through FPC3
output lines
1
B
DCM2 cell input is provided with PDL1
“Forward” and “Backward” pulses
TSE1 5rw3-Sensor Mode Enable for PDL1
0
B
PDL1 operates in “2-Sensor Mode” and DCM3
cell input is driven by fed-through FPC5 output
lines
1
B
PDL1 operates in “3-Sensor Mode” and DCM3
cell input is provided with PDL1 error
information
ERR1 6rwhError Flag for PDL1
0
B
No error has occurred
1
B
Error detected in “3-Sensor Mode”: all PDL1
input signals are simultaneously provided with
high or low level
Bit ERR1 is bit protected (see Page 24-155).
0 3,
[31:7]
r Reserved
Read as 0; should be written with 0.
Field Bits Type Description

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