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Infineon Technologies TC1796 - Page 1829

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-174 V2.0, 2007-07
GPTA, V2.0
DFA07 [15:12] rw Clock Line 7 Driving Source Selection
0
D
CLK7 is provided with f
GPTA
1
D
CLK7 is provided with f
GPTA
divided by 2
1
...
D
...
13
D
CLK7 is provided with f
GPTA
divided by 2
13
14
D
CLK7 is provided with f
GPTA
divided by 2
14
15
D
CLK7 is driven by FPC4 output
DFA03 [17:16] rw Clock Line 3 Driving Source Selection
0
D
CLK3 is driven by DCM2 output
1
D
CLK3 is driven by PLL clock of other GPTA unit
2
D
CLK3 is driven by uncompensated PLL clock
3
D
CLK3 is driven by uncompensated PLL clock of
other GPTA unit
DFALTC [20:18] rw Dividing Factor for LTC Prescaler Clock Selection
The LTCPRE clock is provided with the GPTA module
clock f
GPTA
divided by 2
DFALTC
.
0
D
LTCPRE clock is f
GPTA
1
D
LTCPRE clock is f
GPTA
divided by 2
1
...
D
...
6
D
LTCPRE clock is f
GPTA
divided by 2
6
7
D
LTCPRE clock is f
GPTA
divided by 2
7
0 [31:21] r Reserved
Read as 0; should be written with 0.
Field Bits Type Description

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