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Infineon Technologies TC1796 - Page 1900

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-245 V2.0, 2007-07
GPTA, V2.0
LIMCRHg (g = 0-7)
Input Multiplexer Control Register for Upper Half of LTC Group g
Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
LIM
EN7
LIMG7 0 LIML7
LIM
EN6
LIMG6 0 LIML6
rrwrrwrrwrrw
1514131211109876543210
LIM
EN5
LIMG5 0 LIML5
LIM
EN4
LIMG4 0 LIML4
rrwrrwrrwrrw
Field Bits Type Description
LIML4,
LIML5,
LIML6,
LIML7
[2:0],
[10:8],
[18:16],
[26:24]
rw Multiplexer Line Selection
This bit field selects the input line of a LIMG that
can be selected by bit field LIMGn for LIMG output
n.
000
B
LIMG input IN0 selected
001
B
LIMG input IN1 selected
010
B
LIMG input IN2 selected
011
B
LIMG input IN3 selected
100
B
LIMG input IN4 selected
101
B
LIMG input IN5 selected
110
B
LIMG input IN6 selected
111
B
LIMG input IN7 selected
LIMG4,
LIMG5,
LIMG6,
LIMG7
[6:4],
[14:12],
[22:20],
[30:28]
rw Multiplexer Group Selection
This bit field determines the LIMGng which is
connected to input n of LTC group g.
000
B
LIMG0g selected
001
B
LIMG1g selected
011
B
LIMG3g selected
100
B
LIMG4g selected
All other combinations are reserved. If a reserved
combination of LIMGn is selected, or if
LIMENn = 0, the corresponding LIMG output is
forced to 0 level.

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