TC1796
Peripheral Units (Vol. 2 of 2)
Analog-to-Digital Converter (ADC)
User’s Manual 25-66 V2.0, 2007-07
ADC, V2.0
TCON
Timer Control Register (114
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
TR
TS
EN
TRLD
rh rw rw
1514131211109876543210
0ALB
rrw
Field Bits Type Description
ALB [13:0] rw Arbitration Lock Boundary
The arbitration lock boundary is used to specify the
arbitration lock time t
LOCK
. Arbitration Lock Mode is
automatically enabled if any value greater than zero is
written to ALB.
Note: The arbitration is locked if the value of ALB is
above TRLD.
TRLD [29:16] rw Timer Reload Value
TRLD is loaded into the timer register TSTAT.TIMER
when TSTAT.TIMER = 0 or each time when
SCON.TRS is set.
Note: If TRLD is zero, timer lock is always active and
a service request can be generated for each
timer clock.
TSEN 30 rw Timer Stop Enable
0
B
TSTAT.TIMER = 0 has no effect on the timer
run bit TCON.TR.
1
B
Timer run bit TCON.TR is cleared when
TSTAT.TIMER = 0.
TR 31 rh Timer Run Control
0
B
Timer TSTAT.TIMER is stopped.
1
B
Timer TSTAT.TIMER is running and is
decremented with clock f
TIMER
.
Note: Clearing it TR causes the arbitration lock to be
removed, if it is set.
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