TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-4 V2.0, 2007-07
SCU, V2.0
PMG_CSR
Power Management Control and Status Register
(F0000034
H
) Reset Value: 0000 0100
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0PMST 0REQSLP
rrh rrwh
Field Bits Type Function
REQSLP [1:0] rwh Idle Mode and Sleep Mode Request
00
B
Normal Run Mode
01
B
Request Idle Mode
10
B
Request Sleep Mode
11
B
Reserved; do not use this combination
In Idle Mode or Sleep Mode, these bits are cleared in
response to an enabled interrupt, or when bit 15 of the
Watchdog Timer count register (the WDT_SR.TIM[15]
bit) changes from 0 to 1.
PMST [10:8] rh Power Management State Machine Status
000
B
Waiting for PLL lock condition
001
B
Normal Run Mode
010
B
Idle Mode requested
011
B
Idle Mode acknowledged
100
B
Sleep Mode
101
B
Undefined, reserved
110
B
Undefined, reserved
111
B
Undefined, reserved
0 [7:2],
[31:11]
r Reserved
Read as 0; should be written with 0.
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