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Infineon Technologies TC1796 - Page 252

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-30 V2.0, 2007-07
SCU, V2.0
IGP2 [15:14] rw Interrupt Gating Pattern 2
Bit field IGP2 determines how the pattern detection
influences the output lines GOUT2 and IOUT2.
00
B
The detected pattern is not taken into account.
An activation of IOUT2 is always possible due
to a trigger event.
01
B
The detected pattern is not taken into account.
An activation of IOUT2 is not possible.
10
B
The detected pattern is taken into account. An
activation of IOUT2 is only possible due to a
trigger event while the pattern is detected.
11
B
The detected pattern is taken into account. An
activation of IOUT2 is only possible due to a
trigger event while the pattern is not detected.
IPEN3x
(x = 0-3)
16+x rw Interrupt Pattern Enable for Channel 3
Bit IPEN3x determines if the flag INTFx of channel x
takes part in the pattern detection for the gating of the
requests for the output signals GOUTy and IOUTy.
0
B
The bit INTFx does not take part in the pattern
detection.
1
B
The bit INTFx is taken into consideration for the
pattern detection.
GEEN3 29 rw Generate Event Enable 3
Bit GEEN3 enables the generation of a trigger event
for output channel 3 when the result of the pattern
detection changes. When using this feature, a trigger
(e.g. for an interrupt) is generated during the first
clock cycle when a pattern is detected, or when it is
no longer detected.
0
B
The trigger generation at a change of the
pattern detection result is disabled.
1
B
The trigger generation at a change of the
pattern detection result is enabled.
Field Bits Type Description

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