TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-40 V2.0, 2007-07
SCU, V2.0
Note: SCU_PETSR is a read-only register. Writing to SCU_PETSR results in a bus
error.
SCU_PETSR
SCU Parity Error Trap Status Register
(F00000D4
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0
PFL
6
PFL
5
PFL
4
PFL
3
PFL
2
PFL
1
PFL
0
r rhrhrhrhrhrhrh
Field Bits Type Description
PFLx
(x = 0-6)
xrhParity Error Flag for SRAM Module x
These bits indicate whether a parity error has been
detected in the associated SRAM memory module.
The assignment of the error flags to the SRAM
modules is defined in Table 5-5.
0
B
No parity error detected.
1
B
Parity error is detected.
The PFLx bits are cleared by hardware after a read
access.
0 [31:7] r Reserved
Read as 0.
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