TC1796
System Units (Vol. 1 of 2)
On-Chip System Buses and Bus Bridges
User’s Manual 6-37 V2.0, 2007-07
Buses, V2.0
SBCU_CON
SBCU Control Register (10
H
) Reset Value: 4009 FFFF
H
RBCU_CON
RBCU Control Register (10
H
) Reset Value: 4009 FFFF
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SPC 0 SPE PSE 0 DBG
rw r rwrwrwrw
1514131211109876543210
TOUT
rw
Field Bits Type Description
TOUT [15:0] rw BCU Bus Time-Out Value
The bit field determines the number of System
Peripheral Bus time-out cycles. Default after reset is
FFFF
H
(= 65536 bus cycles).
1)
DBG 16 rw BCU Debug Trace Enable
0
B
BCU debug trace disabled
1
B
BCU debug trace enabled (default after reset)
PSE 18 rw BCU Power Saving (Automatic Clock Control)
Enable
0
B
BCU power saving disabled (default after reset)
1
B
BCU power saving enabled
SPE 19 rw BCU Starvation Protection Enable
0
B
BCU starvation protection disabled
1
B
BCU starvation protection enabled (default
after reset)
SPC [31:24] rw Starvation Period Control
Determines the sample period for the starvation
counter. Must be larger than the number of masters.
The reset value is 40
H
.
0 17 rw Reserved
Read as 0 after reset; should be written with 0.
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