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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
On-Chip System Buses and Bus Bridges
User’s Manual 6-56 V2.0, 2007-07
Buses, V2.0
FPIACK [6:5] rh FPI Bus Acknowledge Status
This bit field indicates the acknowledge signal status
captured from the FPI Bus signal lines when the BCU
break trigger event occurred.
00
B
No special case
01
B
Error
10
B
Reserved
11
B
Retry, slave did not respond
FPIRDY 7rhFPI Bus Ready Status
This bit indicates the ready signal status captured
from the FPI Bus signal lines when the BCU break
trigger event occurred.
0
B
Last cycle of transfer
1
B
Not last cycle of transfer
FPIWR 8rhFPI Bus Write Indication Status
This bit indicates the write signal status captured from
the FPI Bus signal lines when the BCU break trigger
event occurred.
0
B
Single write transfer or write cycle of an atomic
transfer
1
B
No operation or read transfer
FPIRST [10:9] rh FPI Bus Reset Status
This bit field indicates the reset signal status captured
from the FPI Bus signal lines when the BCU break
trigger event occurred.
00
B
Reset of all FPI Bus components
11
B
No reset
others Reserved
FPIOPS 11 rh FPI Bus OCDS Suspend Status
This bit indicates the OCDS suspend signal status
captured from the FPI Bus signal lines when the BCU
break trigger event occurred.
0
B
No OCDS suspend request is pending
1
B
An OCDS suspend request is pending
Field Bits Type Description

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish