TC1796
System Units (Vol. 1 of 2)
Memory Maps
User’s Manual 9-5 V2.0, 2007-07
MemMaps, V2.0
From the PLMB point of view (PMI), this memory segment allows non-cached accesses
to the external peripheral and emulator space, the PMI scratch-pad RAM and read
access to the boot ROM and test ROM (BROM and TROM).
From the DLMB point of view (DMI), this memory segment allows non-cached accesses
to the external peripheral and emulator space and to the DMI memories (LDRAM and
DPRAM).
Segment 14
From the SPB point of view (PCP, DMA, and Cerberus), this memory segment allows
accesses to the external peripheral space, the PMU data memory (SRAM), the DMI
memories (LDRAM and DPRAM), and the PMI scratch-pad memory (SPRAM).
From the CPU point of view (PMI and DMI), this memory segment allows non-cached
accesses to the external peripheral space.
Segment 15
From the SPB point of view (PCP, DMA, and Cerberus), this memory segment allows
accesses to all SFRs and CSFRs, the PCP memories, and the MLI transfer windows.
From the CPU point of view (PMI and DMI), this memory segment allows accesses to all
SFRs and CSFRs, the PCP memories, and the MLI transfer windows.
To Next Page
Loading...