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Infineon Technologies TC1796 - Page 67

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Introduction
User’s Manual 1-28 V2.0, 2007-07
Intro, V2.0
Duty Cycle Measurement (DCM)
Four independent units
0 - 100% margin and time-out handling
f
GPTA
maximum resolution
f
GPTA
/2 maximum input signal frequency
Digital Phase Locked Loop (PLL)
One unit
Arbitrary multiplication factor between 1 and 65535
f
GPTA
maximum resolution
f
GPTA
/2 maximum input signal frequency
Clock Distribution Unit (CDU)
One unit
Provides eight clock output signals (clock bus):
f
GPTA
, divided f
GPTA
clocks, FPC1/FPC4 outputs, DCM clock, LTC prescaler clock
Signal Generation Unit
Global Timers (GT)
Two independent units
Two operating modes (Free-Running Timer and Reload Timer)
24-bit data width
f
GPTA
maximum resolution
f
GPTA
/2 maximum input signal frequency
Global Timer Cell (GTC)
32 units related to the Global Timers
Two operating modes (Capture, Compare and Capture after Compare)
24-bit data width
f
GPTA
maximum resolution
f
GPTA
/2 maximum input signal frequency
Local Timer Cell (LTC)
64 independent units
Three basic operating modes (Timer, Capture and Compare) for 63 units
Special compare modes for one unit
16-bit data width
f
GPTA
maximum resolution
f
GPTA
/2 maximum input signal frequency
Interrupt Sharing Unit
286 interrupt sources, generating up to 92 service requests.

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