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Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Introduction
User’s Manual 1-33 V2.0, 2007-07
Intro, V2.0
As shown in Figure 1-10, the main FADC functional blocks are:
The Input Stage contains the differential inputs and the programmable amplifier
The A/D Converter is responsible for the analog-to-digital conversion
The Data Reduction Unit contains programmable antialiasing and data reduction
filters
The Channel Trigger Control block determines the trigger and gating conditions for
the four FADC channels.
The Channel Timers can independently trigger the conversion of each FADC
channel
The A/D Control block is responsible for the overall FADC functionality.
The FADC module is supplied by the following power supply and reference voltage lines:
V
DDMF
/V
DDMF
: FADC Analog Part Power Supply (3.3 V)
V
DDAF
/V
DDAF
: FADC Analog Part Logic Power Supply (1.5 V)
V
FAREF
/V
FAGND
: FADC Reference Voltage (3.3 V)/FADC Reference Ground

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