TC1796
System Units (Vol. 1 of 2)
System Timer
User’s Manual 15-14 V2.0, 2007-07
STM, V2.0
Note: The bits in registers STM_CAP to STM_TIM0 are all read-only bits.
STM_CAP
STM Timer Capture Register (2C
H
) Reset Value: 0000 0000
H
31 24 23 0
0 STM_CAP[55:32]
rr
Field Bits Type Description
STM[55:32] [23:0] r Captured System Timer Bits [55:32]
The capture register STM_CAP always captures the
STM bits [55:32] when one of the registers
STM_TIM0 to STM_TIM5 is read. This capture
operation is performed in order to enable software to
operate with a coherent value of all the 56 STM bits
at one time stamp.This bit bield contains bits [55:32]
of the 56-bit STM.
0 [31:24] r Reserved
Read as 0.
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