TC1796
System Units (Vol. 1 of 2)
Register Overview
User’s Manual 18-22 V2.0, 2007-07
Regs, V2.0
Table 18-9 Address Map of Port 0
Short Name Description Address Access Mode Reset Value
Read Write
Port 0
P0_ OUT Port 0 Output Register F000 0C00
H
U, SV U, SV 0000 0000
H
P0_OMR Port 0 Output
Modification Register
F000 0C04
H
U, SV U, SV,
32
0000 XXXX
H
– Reserved F000 0C08
H
-
F000 0C0C
H
U, SV U, SV –
P0_IOCR0 Port 0 Input/Output
Control Register 0
F000 0C10
H
U, SV U, SV 2020 2020
H
P0_IOCR4 Port 0 Input/Output
Control Register 4
F000 0C14
H
U, SV U, SV 2020 2020
H
P0_IOCR8 Port 0 Input/Output
Control Register 8
F000 0C18
H
U, SV U, SV 2020 2020
H
P0_IOCR12 Port 0 Input/Output
Control Register 12
F000 0C1C
H
U, SV U, SV 2020 2020
H
– Reserved F000 0C20
H
U, SV U, SV –
P0_IN Port 0 Input Register F000 0C24
H
U, SV U, SV 0000 XXXX
H
– Reserved F000 0C28
H
-
F000 0C3C
H
U, SV U, SV –
P0_PDR Port 0 Pad Driver Mode
Register
F000 0C40
H
U, SV SV, E 0000 0000
H
– Reserved F000 0C44
H
-
F000 0CFC
H
U, SV U, SV –