TC1796
Peripheral Units (Vol. 2 of 2)
Asynchronous/Synchronous Serial Interface (ASC)
User’s Manual 19-25 V2.0, 2007-07
ASC, V2.0
The WHBCON register contains control bits that makes it possible to set/clear flags of
the CON register.
WHBCON
Write Hardware Bits Control Register (50
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0
SET
OE
SET
FE
SET
PE
CLR
OE
CLR
FE
CLR
PE
0
SET
REN
CLR
REN
0
r wwwwww r ww r
Field Bits Type Description
CLRREN 4wClear Receiver Enable Bit
0
B
No effect.
1
B
Bit CON.REN is cleared.
Bit is always read as 0.
SETREN 5wSet Receiver Enable Bit
0
B
No effect.
1
B
Bit CON.REN is set.
Bit is always read as 0.
CLRPE 8wClear Parity Error Flag
0
B
No effect.
1
B
Bit CON.PE is cleared.
Bit is always read as 0.
CLRFE 9wClear Framing Error Flag
0
B
No effect.
1
B
Bit CON.FE is cleared.
Bit is always read as 0.
CLROE 10 w Clear Overrun Error Flag
0
B
No effect.
1
B
Bit CON.OE is cleared.
Bit is always read as 0.