EasyManua.ls Logo

Infineon Technologies TC1796 - Page 1258

Infineon Technologies TC1796
2150 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
TC1796
Peripheral Units (Vol. 2 of 2)
Micro Second Channel (MSC)
User’s Manual 21-41 V2.0, 2007-07
MSC, V2.0
The Downstream Control Register DSC is used to control the operation mode and frame
layout of the downstream channel transmission. It also contains the two pending status
bits.
DSC
Downstream Control Register (14
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0PPD0NBC
rrwrrw
1514131211109876543210
DS
DIS
EN
SEL
H
EN
SEL
L
NDBH NDBL DP CP TM
rh rw rw rw rw rh rh rw
Field Bits Type Description
TM 0rwTransmission Mode
This bit selects the transmission mode of the
downstream channel.
0
B
Triggered Mode selected
1
B
Data Repetition Mode selected
CP 1rhCommand Pending
This bit is set when the downstream command register
DC is written. CP is cleared when the first bit of the
related command frame is sent out.
DP 2rhData Pending
In Triggered Mode, this bit is set when the set data
pending bit ISC.SDP is set by software. In Data
Repetition Mode, this bit is set by hardware at the last
passive time frame. At the start of the data frame, DP is
cleared by hardware.

Table of Contents