TC1796
Peripheral Units (Vol. 2 of 2)
Micro Second Channel (MSC)
User’s Manual 21-46 V2.0, 2007-07
MSC, V2.0
The bit fields of the Downstream Select Data Low Register DSDSL determine the data
source for each bit in shift register SRL.
DSDSL
Downstream Select Data Source Low Register
(24
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SL15 SL14 SL13 SL12 SL11 SL10 SL9 SL8
rw rw rw rw rw rw rw rw
1514131211109876543210
SL7 SL6 SL5 SL4 SL3 SL2 SL1 SL0
rw rw rw rw rw rw rw rw
Field Bits Type Description
SLx
(x = 0-15)
[2*x+1:
2*x]
rw Select Source for SRL
SLx determines which data source is used for the shift
register bit SRL[x] during data frame transmission.
00
B
SRL[x] is taken from data register DD.DDL[x].
01
B
Reserved.
10
B
SRL[x] is taken from the ALTINL input line x.
11
B
SRL[x] is taken from the ALTINL input line x in
inverted state.