Infineon Technologies TC1796 - Page 1271

TC1796
Peripheral Units (Vol. 2 of 2)
Micro Second Channel (MSC)
User’s Manual 21-54 V2.0, 2007-07
MSC, V2.0
The Interrupt Set Clear Register ISC is used to set or clear the MSC interrupt flags
located in the Interrupt Status Register ISR. Reading ISC always returns 0000 0000
H
.
ISC
Interrupt Set Clear Register (48
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
S
DDIS
S
CP
S
DP
S
URDI
S
DTFI
S
DECI
S
DEDI
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1514131211109876543210
0
C
DDIS
C
CP
C
DP
C
URDI
C
DTFI
C
DECI
C
DEDI
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Field Bits Type Description
CDEDI 0wClear DEDI Flag
0
B
No operation.
1
B
Bit ISR.DEDI is cleared.
CDECI 1wClear DECI Flag
0
B
No operation.
1
B
Bit ISR.DECI is cleared.
CDTFI 2wClear DTFI Flag
0
B
No operation.
1
B
Bit ISR.DTFI is cleared.
CURDI 3wClear URDI Flag
0
B
No operation.
1
B
Bit ISR.URDI is cleared.
CDP 4wClear DP Flag
0
B
No operation.
1
B
Bit DSC.DP is cleared.
CCP 5wClear CP Flag
0
B
No operation.
1
B
Bit DSC.CP is cleared.
CDDIS 6wClear DSDIS Flag
0
B
No operation.
1
B
Bit DSC.DSDIS is cleared.